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The 11th Asia and South Pacific Design Automation Conference

Thursday January 26, 2006

Session 5A Advances in Simulation Technologies (13:30 - 15:35)
Location: Room 411+412
Chair(s): Shin'ichi Minato (Hokkaido Univ., Japan), Karem Sakallah (Univ. of Michigan, United States)

5A-1 (Time: 13:30 - 13:55)
TitleDepth-Driven Verification of Simultaneous Interfaces
Author*Ilya Wagner, Valeria Bertacco, Todd Austin (Univ. of Michigan, United States)
Pagepp. 442 - 447
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5A-2 (Time: 13:55 - 14:20)
TitleFSM-Based Transaction-Level Functional Coverage for Interface Compliance Verification
Author*Man-Yun Su, Che-Hua Shih, Juinn-Dar Huang, Jing-Yang Jou (National Chiao Tung Univ., Taiwan)
Pagepp. 448 - 453
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5A-3 (Time: 14:20 - 14:45)
TitleHardware Debugging Method Based on Signal Transitions and Transactions
Author*Nobuyuki Ohba, Kohji Takano (IBM Japan, Japan)
Pagepp. 454 - 459
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5A-4 (Time: 14:45 - 15:10)
TitleCycle Error Correction in Asynchronous Clock Modeling for Cycle-Based Simulation
Author*Junghee Lee, Joonhwan Yi (Samsung Electronics, Republic of Korea)
Pagepp. 460 - 465
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5A-5 (Time: 15:10 - 15:35)
TitleA Fast Logic Simulator Using a Look Up Table Cascade Emulator
Author*Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura (Kyushu Inst. of Tech., Japan)
Pagepp. 466 - 472
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