(Back to Session Schedule)

The 11th Asia and South Pacific Design Automation Conference

Thursday January 26, 2006

Session 5B Scheduling for Embedded Systems (13:30 - 15:35)
Location: Room 413
Chair(s): Sri Parameswaran (Univ. of New South Wales, Australia), Sang Lyul Min (Seoul National Univ., Republic of Korea)

5B-1 (Time: 13:30 - 13:55)
TitlePower-Aware Scheduling and Dynamic Voltage Setting for Tasks Running on a Hard Real-Time System
AuthorPeng Rong, *Massoud Pedram (Univ. of Southern California, United States)
Pagepp. 473 - 478
Detailed information (abstract, keywords, etc)
PDF file

5B-2 (Time: 13:55 - 14:20)
TitleOptimal TDMA Time Slot and Cycle Length Allocation for Hard Real-Time Systems
Author*Ernesto Wandeler, Lothar Thiele (ETH Zurich, Switzerland)
Pagepp. 479 - 484
Detailed information (abstract, keywords, etc)
PDF file

5B-3 (Time: 14:20 - 14:45)
TitlePOSIX modeling in SystemC
Author*Hector Posadas, Jesus Adamez, Pablo Sanchez, Eugenio Villar (Univ. of Cantabria, Spain), Francisco Blasco (DS2, Spain)
Pagepp. 485 - 490
Detailed information (abstract, keywords, etc)
PDF file

5B-4 (Time: 14:45 - 15:10)
TitlePARLGRAN: Parallelism Granularity Selection for Scheduling Task Chains on Dynamically Reconfigurable Architectures
Author*Sudarshan Banerjee, Elaheh Bozorgzadeh, Nikil Dutt (Univ. of California, Irvine, United States)
Pagepp. 491 - 496
Detailed information (abstract, keywords, etc)
PDF file

5B-5 (Time: 15:10 - 15:35)
TitleMemory Optimal Single Appearance Schedule with Dynamic Loop Count for Synchronous Dataflow Graphs
Author*Hyunok Oh, Nikil Dutt (Univ. of California, Irvine, United States), Soonhoi Ha (Seoul National Univ., Republic of Korea)
Pagepp. 497 - 502
Detailed information (abstract, keywords, etc)
PDF file