(Back to Session Schedule)

The 11th Asia and South Pacific Design Automation Conference

Wednesday January 25, 2006

Session 3C Routing and Interconnect Optimization (16:00 - 18:05)
Location: Room 414+415
Chair(s): Youichi Shiraishi (Gunma Univ., Japan), Tong Jing (Tsinghua Univ., China)

3C-1 (Time: 16:00 - 16:25)
TitlePost-Routing Redundant Via Insertion for Yield/Reliability Improvement
Author*Kuang-Yao Lee, Ting-Chi Wang (National Tsing Hua Univ., Taiwan)
Pagepp. 303 - 308
Detailed information (abstract, keywords, etc)
PDF file

3C-2 (Time: 16:25 - 16:50)
TitleTemperature-Aware Routing in 3D ICs
AuthorTianpei Zhang, *Yong Zhan, Sachin S. Sapatnekar (Univ. of Minnesota, United States)
Pagepp. 309 - 314
Detailed information (abstract, keywords, etc)
PDF file

3C-3 (Time: 16:50 - 17:15)
TitleClosed Form Solution for Optimal Buffer Sizing Using The Weierstrass Elliptic Function
AuthorSebastian Vogel (Darmstadt Univ. of Tech., Germany), *Martin D.F. Wong (Univ. of Illinois, Urbana-Champaign, United States)
Pagepp. 315 - 319
Detailed information (abstract, keywords, etc)
PDF file

3C-4 (Time: 17:15 - 17:40)
TitleAn O(mn) Time Algorithm for Optimal Buffer Insertion of Nets with m Sinks
Author*Zhuo Robert Li, Weiping Shi (Texas A&M Univ., United States)
Pagepp. 320 - 325
Detailed information (abstract, keywords, etc)
PDF file

3C-5 (Time: 17:40 - 18:05)
TitleSpec-based Flip-Flop and Latch Repeater Planning
Author*Man Chung Hon (Intel Co., United States)
Pagepp. 326 - 331
Detailed information (abstract, keywords, etc)
PDF file