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The 11th Asia and South Pacific Design Automation Conference

Wednesday January 25, 2006

Session 2B Application Examples with Leading Edge Design Methodology (13:30 - 15:35)
Location: Room 413
Chair(s): In-Cheol Park (KAIST, Republic of Korea), Hideharu Amano (Keio Univ., Japan)

2B-1 (Time: 13:30 - 13:55)
TitleSAVS: A Self-Adaptive Variable Supply-Voltage Technique for Process -Tolerant and Power-Efficient Multi-issue Superscalar Processor Design
AuthorHai Li (Qualcomm Inc., United States), Yiran Chen (Synopsys Inc., United States), *Kaushik Roy, Cheng-Kok Koh (Purdue Univ., United States)
Pagepp. 158 - 163
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2B-2 (Time: 13:55 - 14:20)
TitleThe Design and Implementation of a Low-Latency On-Chip Network
Author*Robert Mullins, Andrew West, Simon Moore (Univ. of Cambridge, Great Britain)
Pagepp. 164 - 169
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2B-3 (Time: 14:20 - 14:45)
TitleA Near Optimal Deblocking Filter for H.264 Advanced Video Coding
AuthorShen-Yu Shih, Cheng-Ru Chang, *Youn-Long Lin (National Tsing Hua Univ., Taiwan)
Pagepp. 170 - 175
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2B-4 (Time: 14:45 - 15:10)
TitleImage Segmentation and Pattern Matching Based FPGA/ASIC Implementation Architecture of Real-Time Object Tracking
Author*Kousuke Yamaoka, Takashi Morimoto, Hidekazu Adachi, Tetsushi Koide, Hans Juergen Mattausch (Hiroshima Univ., Japan)
Pagepp. 176 - 181
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2B-5 (Time: 15:10 - 15:35)
TitlePrefetching-Aware Cache Line Turnoff for Saving Leakage Energy
Author*Ismail Kadayif (Canakkale Onsekiz Mart Univ., Turkey), Mahmut Kandemir, Feihui Li (Pennsylvania State Univ., United States)
Pagepp. 182 - 187
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