SystemC
Recoding Infrastructure for SystemC v0.6.3 derived from Accellera SystemC 2.3.1
Accellera SystemC proof-of-concept library
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#include "sysc/kernel/sc_simcontext.h"
#include "sysc/datatypes/bit/sc_logic.h"
#include "sysc/communication/sc_signal_ifs.h"
Go to the source code of this file.
Namespaces | |
sc_core | |
Functions | |
void | sc_core::halt (int, sc_simcontext *=sc_get_curr_simcontext()) |
A new parameter segment ID is added for the out-of-order simulation. More... | |
void | sc_core::wait (int, int, sc_simcontext *=sc_get_curr_simcontext()) |
A new parameter segment ID is added for the out-of-order simulation. More... | |
void | sc_core::at_posedge (const sc_signal_in_if< bool > &, int, sc_simcontext *=sc_get_curr_simcontext()) |
A new parameter segment ID is added for the out-of-order simulation. More... | |
void | sc_core::at_posedge (const sc_signal_in_if< sc_dt::sc_logic > &, int, sc_simcontext *=sc_get_curr_simcontext()) |
A new parameter segment ID is added for the out-of-order simulation. More... | |
void | sc_core::at_negedge (const sc_signal_in_if< bool > &, int, sc_simcontext *=sc_get_curr_simcontext()) |
A new parameter segment ID is added for the out-of-order simulation. More... | |
void | sc_core::at_negedge (const sc_signal_in_if< sc_dt::sc_logic > &, int, sc_simcontext *=sc_get_curr_simcontext()) |
A new parameter segment ID is added for the out-of-order simulation. More... | |