/local/lecs/lecs/risc_v0.4.2/sources/build/risc_v0.4.2/src/internal_representation/design.h

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#ifndef DESGIN_H_INCLUDED_
#define DESGIN_H_INCLUDED_

#include "rose.h"
#include "port_mapping_cache.h"

#include <vector>

#define PSG_MODE risc::get_design()->psg_mode

namespace risc {

class Thread;
class Event;
class Function;
class HierarchicalChannel;
class HierarchicalChannelInstance;
class Instance;
class InstanceTree;
class Interface;
class Module;
class PathInstanceMapper;
class PrimitiveChannel;
class PrimitiveChannelInstance;
class Variable;

typedef std::vector<Event*> EventVector;
typedef std::vector<Function*> FunctionVector;
typedef std::vector<HierarchicalChannel*> HierarchicalChannelVector;
typedef std::vector<HierarchicalChannelInstance*> HierarchicalChannelInstanceVector;
typedef std::vector<Instance*> InstanceVector;
typedef std::vector<Interface*> InterfaceVector;
typedef std::vector<Module*> ModuleVector;
typedef std::vector<PrimitiveChannel*> PrimitiveChannelVector;
typedef std::vector<PrimitiveChannelInstance*> PrimitiveChannelInstanceVector;
typedef std::vector<Variable*> VariableVector;

class Design {

public:

  explicit Design(int argc, char* argv[], bool is_psg_mode = false);
  ~Design();

  void initialize_port_mapping();
  void initialize_interfaces();
  void initialize_definitions();
  void initialize_top_modules();
  void initialize_global_functions();
  void initialize_global_variables();
  void initialize_path_instance_mapper();

  /*
   * Functions to print design properties
   */
  void print_all_class_definitions();
  void print_all_global_functions();
  void print_design();

  /*
   * Interface for the instance tree
   */
  InstanceTree get_root();

  /*
   * Containers for the different design elements
   */
  ModuleVector module_definitions_;
  InstanceVector top_modules_;
  PrimitiveChannelVector primitive_channel_;
  HierarchicalChannelVector hierarchical_channel_;
  InterfaceVector interfaces_;

  /*
   * global and sc_main related design stuff
   */
  VariableVector global_variables_;
  FunctionVector global_functions_;

  /*
   * Functions to search in design
   */
  Module *find_module_definition(SgClassDefinition* cd);
  PrimitiveChannel* find_prim_channel_definition(SgClassDefinition* cd);
  HierarchicalChannel* find_channel_definition(SgClassDefinition* cd);
  Interface *find_interface(SgClassDefinition* cd);

  Variable* find_global_variable(SgVariableDefinition* var_def);

  /*
   * Rose specific elements
   */
  SgProject *project_;

  /*
   * misc
   */
  int old_argc_;
  char **old_argv_;

  std::vector<std::string> input_files_;

  PathInstanceMapper *path_instance_mapper_;

  PortMappingCache port_mapping_cache_;

  void reset_instance_counter();

  std::string dynamic_analysis_filename_;

  std::string instrumentor_output_filename_;

  bool perform_static_analysis();

  void add_module_to_definition_list(SgClassDefinition *class_def);

  void add_hierarchical_channel_to_defintion_list(SgClassDefinition *class_def);

  std::string get_design_file_name();

  bool is_analyzable();
  
  bool psg_mode;
  int psg_count;
  std::vector<int> psg_seg_count;
  std::vector<Thread*> loaded_threads; 
  std::vector<Thread*> simulation_threads;

private:

  Design(const Design &d);
};

class GlobalDesign {
public:
  static Design *design_static;
};
Design* get_design();
SgProject* get_project();

}; // end namespace risc

#endif /* DESGIN_H_INCLUDED_ */

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