Index of /~cad/publications/tech-reports/2003

Name	Last modified	Size

Parent Directory		-
INDEX	2006-05-23 15:27	17K
INDEX.html	2007-02-01 18:56	30K
TR-03-02.methodology..>	2003-03-11 03:26	1.3M
TR-03-03.channel.pdf	2003-03-11 03:26	183K
TR-03-06.verificatio..>	2003-03-11 03:26	125K
TR-03-08.communicati..>	2003-03-11 03:26	135K
TR-03-09.g729e.pdf	2003-09-18 11:37	291K
TR-03-10.tlm.pdf	2003-09-18 11:37	255K
TR-03-11.systemc.pdf	2003-09-18 11:37	316K
TR-03-12.RTOS.pdf	2003-09-18 11:37	104K
TR-03-13.c2sc.pdf	2003-09-18 11:37	382K
TR-03-21.spec.pdf	2003-06-25 00:00	454K
TR-03-28.NISC.pdf	2003-10-02 14:28	291K
TR-03-29.arproof.pdf	2003-10-01 13:21	116K
TR-03-30.comm.pdf	2003-10-16 18:01	446K
TR-03-30.comm.ps.gz	2003-10-16 18:01	503K
TR-03-31.verificatio..>	2003-10-16 14:17	260K
TR-03-33.cr.pdf	2003-11-19 00:02	97K
TR-03-41.tutorial.pdf	2004-01-05 15:31	5.4M
TR-03-42.RTL.pdf	2004-01-30 06:33	303K

UCI Cadlab

Technical Reports

This directory contains the UCI Cadlab technical report publications for the year 2003.

Please check the INDEX file(s) for a detailed listing of the technical reports including abstracts.

Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel Gajski, "C-based Interactive RTL Design Methodology," CECS, UC Irvine, Technical Report CECS-TR-03-42, December 2003.
Samar Abdi, Junyu Peng, Haobo Yu, Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel Gajski, "System-on-Chip Environment (SCE Version 2.2.0 Beta): Tutorial," CECS, UC Irvine, Technical Report CECS-TR-03-41, July 2003.
Dongwan Shin, Samar Abdi, Daniel Gajski, "Automatic Generation of Bus Functional Models from Transaction Level Models," CECS, UC Irvine, Technical Report CECS-TR-03-33, November 2003.
Daniel Gajski and Samar Abdi, "System Debugging and Verification : A New Challenge," CECS, UC Irvine, Technical Report CECS-TR-03-31, October 2003.
Andreas Gerstlauer, "Communication Abstractions for System-Level Design and Synthesis," CECS, UC Irvine, Technical Report CECS-TR-03-30, October 2003.
Samar Abdi and Daniel D. Gajski, "Provably Correct Architecture Refinement," CECS, UC Irvine, Technical Report CECS-TR-03-29, September 2003.
Daniel D. Gajski, "NISC: The Ultimate Reconfigurable Component," CECS, UC Irvine, Technical Report CECS-TR-03-28, September 2003.
Andreas Gerstlauer, Kiran Ramineni, Rainer Dömer and Daniel D. Gajski, "System-On-Chip Specification Style Guide," CECS, UC Irvine, Technical Report CECS-TR-03-21, June 2003.
Kiran Ramineni and Daniel Gajski, "C to SpecC Conversion Style," CECS, UC Irvine, Technical Report CECS-TR-03-13, April 2003.
Haobo Yu, Andreas Gerstlauer, Daniel Gajski, "RTOS Scheduling in Transaction Level Models," CECS, UC Irvine, Technical Report CECS-TR-03-12, March 2003.
Lucai Cai, Shireesh Verma, Daniel D. Gajski, "Comparison of SpecC and SystemC Languages for System Design," CECS, UC Irvine, Technical Report CECS-TR-03-11, May 2003.
Lucai Cai and Daniel Gajski, "Transaction Level Modeling in System Level Design," CECS, UC Irvine, Technical Report CECS-TR-03-10, March 2003.
Anshuman Tripathi, Shireesh Verma, Daniel D. Gajski, "G.729E Algorithm Optimization for ARM926EJ-S Processor," CECS, UC Irvine, Technical Report CECS-TR-03-09, March 2003.
Samar Abdi and Daniel Gajski, "Automatic Communication Refinement for System Level Design," CECS, UC Irvine, Technical Report CECS-TR-03-08, March 2003.
Samar Abdi and Daniel Gajski, "Formal Verification of Specification Partitioning," CECS, UC Irvine, Technical Report CECS-TR-03-06, March 2003.
Lukai Cai and Daniel Gajski, "Channel Mapping in System Level Design," CECS, UC Irvine, Technical Report CECS-TR-03-03, January 2003.
Daniel Gajski, Junyu Peng, Andreas Gerstlauer, Haobo Yu, Dongwan Shin, "System Design Methodology and Tools," CECS, UC Irvine, Technical Report CECS-TR-03-02, January 2003.