Conference Proceedings

J. Liu, P. Chou, N. Bagherzadeh, and F. Kurdahi, “Power-Aware Scheduling Under Timing Constraints for Mission-Critical Embedded Systems,” Proceedings of the 38th Design Automation Conference, pp 840-845, Las Vegas, NV, June 2001

S. Gupta, N. Savoiu, S. Kim, N. Dutt, R. Gupta, and A. Nicolau, “Speculation Techniques for High Level Synthesis of Control Intensive Designs,” Proceedings of the 38th Design Automation Conference, pp 269-272, Las Vegas, NV, June 2001

I. Bayraktaroglu and A. Orailoglu, “Test Volume and Application Time Reduction Through Scan Chain Concealment,” Proceedings of the 38th Design Automation Conference, pp 151-155, Las Vegas, NV, June 2001

P. Petrov and A. Orailoglu, “Speeding Up Control-Dominated Applications Through Microarchitectural Customizations in Embedded Processors,” Proceedings of the 38th Design Automation Conference, pp 512-517, Las Vegas, NV, June 2001

S. Almukhaizim, P. Petrov and A. Orailoglu, “Low-Cost, Software-Based Self-Test Methodologies for Performance Faults in Processor Control Subsystems,” Proceedings of the IEEE Custom Integrated Circuits Conference, San Diego, CA, May 2001

P. Grun, N. Dutt, and A. Nicolau, “Access Pattern Based Local Memory Customization for Low Power Embedded Systems,” Proceedings of the Design Automation and Test in Europe Conference (DATE 2001), Munich, Germany, March 2001

T. Givargis, F. Vahid, and J. Henkel, “Trace-Driven System-Level Power Evaluation of System-on-Chip Peripheral Cores,” Proceedings of the Asia-South Pacific Design Automation Conference (ASP-DAC), Yokohama, Japan, January 2001

J. Zhu, and D. Gajski, “Compiling SpecC for Simulation,” Proceedings of the Asia-South Pacific Design Automation Conference (ASP-DAC), Yokohama, Japan, January 2001

N. Dutt, A. Nicolau, H. Tomiyama, and A. Halambi, “New Directions in Compiler Technology for Embedded Systems,” Proceedings of the Asia South-Pacific Design Automation Conference (ASP-DAC), Yokohama, Japan, January 2001

P. Mishra, P. Grun, N. Dutt, A. Nicolau, “Processor-Memory Co-Exploration Driven by a Memory-Aware Architecture Description Language,” Proceedings of the 14th International Conference on VLSI Design, Bangalore, India, January 2001