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Conference Proceedings

40th Design Automation Conference (DAC)

S. Abdi, D. Shin, and D. Gajski, “Automatic Communication Refinement for System Level Design,” 40th Design Automation Conference, pp 300-305, Anaheim, CA, June 2003 download pdf

E. Bozorgzadeh, S. Ghiasi, A. Takahashi, and M. Sarrafzadeh, “Optimal Integer Delay Budgeting on Directed Acyclic Graphs,” 40th Design Automation Conference, pp 300-305, Anaheim, CA, June 2003 download pdf

T. Givargis, “Improving Indexing for Cache Miss Reduction in Embedded Systems,” 40th Design Automation Conference, pp 875-880, Anaheim, CA, June 2003 download pdf

D. Li, Q. Xie, and P. Chou, “Scalable Modeling and Optimization of Mode Transitions Based on Decoupled Power Management Architecture,” 40th Design Automation Conference, pp 119-124, Anaheim, CA, June 2003 download pdf

R. Lysecky and F. Vahid, “On-Chip Logic Minimization,” 40th Design Automation Conference, pp 334-337, Anaheim, CA, June 2003 download pdf

W. Rao, I. Bayraktaroglu, and A. Orailoglu, “Test Application Time and Volume Compression Through Overlapping,” 40th Design Automation Conference, pp 732-737, Anaheim, CA, June 2003 download pdf

M. Reshadi, P. Mishra and N. Dutt, “Instruction Set Compiled Simulation: A Technique for Fast and Flexible Instruction Set Simulation,” 40th Design Automation Conference, pp 758-763, Anaheim, CA, June 2003 download pdf

G. Stitt, R. Lysecky, and F. Vahid, “Dynamic Hardware/Software Partitioning: A First Approach,” 40th Design Automation Conference, pp 250-255, Anaheim, CA, June 2003 download pdf

14th IEEE Workshop on Rapid System Prototyping

P. Mishra, A. Kejariwal, and N. Dutt, “Rapid Exploration of Pipelined Processors Through Automatic Generation of Synthesizable RTL Models,” 14th IEEE Workshop on Rapid System Prototyping, pp 226-232, San Diego, CA, June 2003

2003 International Symposium on Low Power Electronics and Design

P. Chou, C. Park, J. Park, K. Pham, and J. Liu, “B#: a Battery Emulator and Power Profiling Instrument,” 2003 International Symposium on Low Power Electronics and Design, pp 288-293, Seoul, Korea, August 2003 download pdf

P.Heydari and Y. Zhang, “A Novel High Frequency, High-Efficiency, Differential Class-E Power Amplifier in 0.18um CMOS, Payam Heydari, and Ying Zhang,” 2003 International Symposium on Low Power Electronics and Design, pp 455-458 Seoul, Korea, August 2003 download pdf

J. Lee, K. Choi, and N. Dutt, “Energy-Efficient Instruction Set Synthesis for Application-Specific Processors,” 2003 International Symposium on Low Power Electronics and Design, pp 330-333, Seoul, Korea, August 2003download pdf

D. Nicolaescu, A. Veidenbaum, and A. Nicolau, “Reducing Data Cache Energy Consumption via Cached Load/Store Queue,” 2003 International Symposium on Low Power Electronics and Design, pp 252-257, Seoul, Korea, August 2003 download pdf

CODES + ISSS

L. Cai and D. Gajski, “A Transaction Level Modeling: An Overview,” First IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, pp 19-24,Newport Beach, CA, October 2003
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S. Cotterell, F. Vahid, W. Najjar and H. Hsieh, “First Results with eBlocks: Embedded Systems Building Blocks,” First IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, pp 168-175 Newport Beach, CA, October 2003 download pdf

A. Koohi, N. Bagherzadeh, and C. Pan, “A Fast Parallel Reed-Solomon Decoder on a Reconfigurable Architecture,” First IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, pp 59-64,Newport Beach, CA, October 2003 download pdf

B. Mohebbi, E. Filho, R. Maestre, M. Davies, and F. Kurdahi, “A Case Study of Mapping a Software Defined Radio (SDR) Application on a Reconfigurable DSP Core,” First IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, pp 103-108, Newport Beach, CA, October 2003 download pdf

M. Reshadi, N. Bansa, P. Mishra and N. Dutt, “An Efficient Retargetable Framework for Instruction-Set Simulation,” First IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, pp 13-18, Newport Beach, CA, October 2003 download pdf

H. Yu, A. Gerstlauer, and D. Gajski, “RTOS Scheduling in Transaction Level Models,” First IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, pp 31-36, Newport Beach, CA,October 2003 download pdf

First Workshop on Embedded Systems for Real-Time Multimedia

S. Pasricha, S. Mohapatra, M. Luthra, N. Dutt, and N. Venkatasubramanian, “Reducing Backlight Power Consumption for Streaming Video Applications on Mobile Handheld Devices,” ESTIMedia 2003, First Workshop on Embedded Systems for Real-Time Multimedia, Newport Beach, CA, October 2003. download pdf

10th International Symposium on Hardware/Software CoDesign

B. Grattan, G. Stitt, and F. Vahid, “Codesign-Extended Applications,” 10th International Symposium on Hardware/Software CoDesign, pp 1-6, Estes Park, CO, May 2002 download pdf

J. Liu, P. Chou, and N. Bagherzadeh, “Communication Speed Selection for Embedded Systems with Networked Voltage-Scalable Processors,” 10th International Symposium on Hardware/Software CoDesign, pp 169-174, Estes Park, CO, May 2002 download pdf

M. Palesi and T. Givargis, “Multi-Objective Design Space Exploration Using Genetic Algorithms,” 10th International Symposium on Hardware/Software CoDesign, pp 67-72, Estes Park, CO, May 2002 download pdf

P. Petrov and A. Orailoglu, “Energy Frugal Tags in Reprogrammable I-Caches for Application-Specific Embedded Processors,” 10th International Symposium on Hardware/Software CoDesign, pp 181-186, Estes Park, CO, May 2002 download pdf