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Conference Proceedings

ACM International Symposium on Field-Programmable Gate Arrays (FPGA)

Location: Monterey, CA
Web Site: http://isfpga.cs.caltech.edu/

S. Sivaswamy, G. Wang, C. Ababei, K. Bazargan, R.Kastner, and E. Bozorgzadeh, “HARP:Hard-wired Routing Pattern FPGAs,”  ACM International Symposium on Field-Programmable Gate Arrays (FPGA), February 2005. download pdf

G. Stitt, Z. Guo, F. Vahid, and W. Najjar, “Techniques for Synthesizing Binaries to an Advanced Register/Memory Structure,” ACM International Symposium on Field-Programmable Gate Arrays (FPGA), February 2005. download pdf

Asia South Pacific Design Automation Conference 2005 Shanghai China (ASP-DAC 2005)

Location: Shanghai, China
Web Site: http://www.aspdac.com/

S. Abdi and D. Gajski, “A Formalism for Functionality Preserving System Level Transformations,” Asia and South Pacific Design Automation Conference (ASP-DAC 2005), Shanghai, China, pp 139-144, January 18-21, 2005 download pdf

Y. Agarwal, C. Schurgers, and R. Gupta, “Dynamic Power Management Using On-Demand Paging for Networked Embedded Systems,” Asia and South Pacific Design Automation Conference (ASP-DAC 2005), Shanghai, China, pp 755-759, January 18-21, 2005 download pdf

R. Ayoub and A. Orailoglu, ” A Unified Transformational Approach for Reductions in Fault Vulnerability, Power, and Crosstalk Noise and Delay on Processor Buses,” Asia and South Pacific Design Automation Conference (ASP-DAC 2005), Shanghai, China, pp 729-734, January 18-21, 2005 download pdf

L. Cai, A. Gerstlauer,  and D. Gajski, “Multi-Metric and Multi-Entity Characterization of Applications for Early System Design Exploration,” Asia and South Pacific Design Automation Conference (ASP-DAC 2005), Shanghai, China, pp 944-947, January 18-21, 2005 download pdf

A. Gerstlauer, D. Shin, R. Doemer, and D. Gajski, “System-Level Communication Modeling for Network-on-Chip Synthesis,” Asia and South Pacific Design Automation Conference (ASP-DAC 2005), Shanghai, China, pp 45-48, January 18-21, 2005 download pdf

S. Pasricha, N. Dutt, and M. Ben-Romdhane, “Automated Throughput-Driven Synthesis of Bus-Based Communication Architectures,” Asia and South Pacific Design Automation Conference (ASP-DAC 2005), Shanghai, China, pp 495-498, January 18-21, 2005 download pdf

J. Peng, S. Abdi, and D. Gajski, “A Clustering Technique to Optimize hardware/Software Synchronization,” Asia and South Pacific Design Automation Conference (ASP-DAC 2005), Shanghai, China, pp 965-968, January 18-21, 2005 download pdf

W. Rao, A. Orailoglu, and R. Karri, “Fault Tolerant Nanoelectronic Processor Architectures,” Asia and South Pacific Design Automation Conference (ASP-DAC 2005), Shanghai, China, pp 311-316, January 18-21, 2005 download pdf

J. Seo and N. Dutt, “A Generalized Technique for Energy-Efficient Operating Voltage Set-Up in Dynamic Voltage Scaled Processors,” Asia and South Pacific Design Automation Conference (ASP-DAC 2005), Shanghai, China, pp 836-841, January 18-21, 2005 download pdf

R. Topaloglu and A. Orailoglu, “Forward Discrete Probability Propagation Method for Device Performance Characterization Under Process Variations,” Asia and South Pacific Design Automation Conference (ASP-DAC 2005), Shanghai, China, pp 220-223, January 18-21, 2005 download pdf

S. Verma, K. Ramineni, and I. Harris, “An Efficient Control-Oriented Coverage Metric,” Asia and South Pacific Design Automation Conference (ASP-DAC 2005), Shanghai, China, pp 317-322, January 18-21, 2005 download pdf
T. Wei, K. Wu, R. Karri, and A. Orailoglu, “Fault Tolerant Quantum Cellular Array (QCA) Design Using Triple Modular Redundancy with Shifted Operands,” Asia and South Pacific Design Automation Conference (ASP-DAC 2005), Shanghai, China, pp 1192-1195, January 18-21, 2005 download pdf

C. Zhang and F. Kurdahi, “On Combining Iteration Space Tiling with Data Space Tiling for Scratch-Pad Memory Systems,” Asia and South Pacific Design Automation Conference (ASP-DAC 2005), Shanghai, China, pp 965-968, January 18-21, 2005 download pdf