Conference Proceedings
IEEE Workshop on Embedded Systems for Real-Time Multimedia
Location: New York, NY
Web Site: http://peace.snu.ac.kr/ESTIMedia/
B. Gorjiara, D. Gajski, “Design Space Exploration of C Programs Using NISC: A Case-Study on DCT algorithm,” IEEE workshop on Embedded Systems for Real-Time Multimedia, April 2005. download pdf
A. Kejariwal, S. Gupta, A. Nicolau, N. Dutt and R. Gupta, “Energy Analysis of Multimedia Watermarking in Mobile Handheld Devices,” IEEE Workshop on Embedded Systems for Real-Time Multimedia (ESTIMedia), April 2005. download pdf
International Conference on Sensing Technologies (ICST 2005)
Location: Palmerston North, New Zealand
Web Site: http://icst.massey.ac.nz/
J. Lu, L. Bao, and T. Suda, “Probabilistic Self-Scheduling for Coverage Configuaration in Sensor Networks,” International COnference of Sensing Technology, November 21-23 2005. download pdf
Genetic and Evolutionary Computation Conference (GECCO 2005)
Location: Washington D.C.
Web Site: http://isgec.org/gecco-2005/
T. Suda, M. Moore, T. Nakano, R. Egashira, and A. Enomoto, “Exploratory Research on Molecular Communication between Nanomachines,” Genetic and Evolutionary Computation Conference, June 25-29 2005. download pdf
Design, Automation and Test in Europe Conference (DATE 05)
Location: Messe Munich, Germany
Website: www.date-conference.com
R. Lysecky, and F. Vahid, “A Study of the Speedups and Competitiveness of FPGA Soft Processor Cores Using Dynamic Hardware/ Software Partitioning,” Proceedings of the Design, Automation and Test in Europe Conference (DATE 05), Messe Munich, Germany, pp 18-23, March 7-11 2005 download pdf
A. Ghosh and T. Givargis, “LORD: A Localized, Reactive and Distributed Protocol for Node Scheduling in Wireless Sensor Networks,” Proceedings of the Design, Automation and Test in Europe Conference (DATE 05), Messe Munich, Germany, pp 190-195, March 7-11 2005 download pdf
S. Abdi and D. Gajski, “Functional Validation of System Level Static Scheduling,” Proceedings of the Design, Automation and Test in Europe Conference (DATE 05), Messe Munich, Germany, pp 542-547, March 7-11 2005 download pdf
P. Mishra and N. Dutt, “Functional Coverage Driven Test Generation for Validation of Pipelined Processors,” Proceedings of the Design, Automation and Test in Europe Conference (DATE 05), Messe Munich, Germany, pp 678-683, March 7-11 2005 download pdf
A. Nacul and T. Givargas, “Lightweight Multitasking Support for Embedded Systems Using the Phantom Serialized Compiler,” Proceedings of the Design, Automation and Test in Europe Conference (DATE 05), Messe Munich, Germany pp 742-747, March 7-11 2005 download pdf
S. Zhao and D. Gajski, “Defining an Enhanced RTL Semantics,” Proceedings of the Design, Automation and Test in Europe Conference (DATE 05), Messe Munich, Germany, pp 548-553,, March 7-11 2005 download pdf
M. Reshadi and N. Dutt, “Generic Pipelined Processor Modeling and Cycle-Accurate Simulation Generation,” Proceedings of the Design, Automation and Test in Europe Conference (DATE 05), Messe Munich, Germany, pp 786-791, March 7-11 2005 download pdf
I. Issenin and N. Dutt, “FORAY-GEN: Automatic Generation of Affine Functions for Memory Optimizations,” Proceedings of the Design, Automation and Test in Europe Conference (DATE 05), Messe Munich, Germany, pp 808-813, March 7-11 2005 download pdf
R. Mannion, H. Hsieh, S. Cotterell and F. Vahid, “System Synthesis for Networks of Programmable Blocks,” Proceedings of the Design, Automation and Test in Europe Conference (DATE 05), Messe Munich, Germany, pp 888-893, March 7-11 2005 download pdf
P.Biswas, S. Banerjee, N. Dutt, L. Pozzi and P. Ienne, “ISEGEN: Generation of High-Quality Instruction Set Extensions by Iterative Improvement,” Proceedings of the Design, Automation and Test in Europe Conference (DATE 05), Messe Munich, Germany, pp 1246-1251, March 7-11 2005 download pdf
A. Shrivastava, N. Dutt, A. Nicolau and E. Earlie, “PBEXPLORE: A Framework for Compiler-in-the-Loop Exploration of Partial Bypassing in Embedded Processors,”Proceedings of the Design, Automation and Test in Europe Conference (DATE 05), Messe Munich, Germany, pp 1264-1270, March 7-11 2005 download pdf
G. Stitt and F. Vahid, “A Decompilation Approach to Partitioning Software for Microprocessor/FPGA Platforms Minimization,” Proceedings of the Design, Automation and Test in Europe Conference (DATE 05), Messe Munich, Germany, pp 396-397 , March 7-11 2005 download pdf
ACM/IFIP/USENIX International Middleware Conference-Middleware 2005
Location: Grenoble, France
Web Site: http://middleware05.objectweb.org/
K. Raman, Y. Zhang, M. Panahi, J.A. Colmenares, R. Klefstad, “RTZen: Highly Predictable, Real-time Java Middleware for Distributed and Embedded Systems,” Middleware 2005, November 28-December 2, 2005.
IEEE Conference on Nanotechnology (NANO 2005)
Location: Nagoya, Japan
Web Site: http://www.mein.nagoya-u.ac.jp/IEEE-NANO/IEEE-NANO-2005/
T. Nakano, T. Suda, M. Moore, R. Egashira, A. Enomoto, and K. Arima, “Molecular Communication for Nanomachines Using Intercellular Calcium Signaling,” IEEE Conference on Nanotechnology, June 11-15, 2005.download pdf
ACM International Symposium on Field-Programmable Gate Arrays (FPGA)
Location: Monterey, CA
Web Site: http://isfpga.cs.caltech.edu/
S. Sivaswamy, G. Wang, C. Ababei, K. Bazargan, R.Kastner, and E. Bozorgzadeh, “HARP:Hard-wired Routing Pattern FPGAs,” ACM International Symposium on Field-Programmable Gate Arrays (FPGA), February 2005. download pdf
G. Stitt, Z. Guo, F. Vahid, and W. Najjar, “Techniques for Synthesizing Binaries to an Advanced Register/Memory Structure,” ACM International Symposium on Field-Programmable Gate Arrays (FPGA), February 2005. download pdf
International Conference on High Performance Computing in Asia Pacific Region (HPC Asia)
Location: Beijing, China
Web Site:http://www.ict.ac.cn/hpcasia2005/
P.D’Alberto and A. Nicolau, “Adaptive Strassen and ATLAS’s DGEMM: A Fast Square-Matrix Multiply for Modern High-Performance Systems,” International Conference on High Performance Computing in Asia Pacific Region (HPC Asia), November 30-December 3, 2005. download pdf
International Conference on Application-specific Systems, Architectures and Processors (IEEE ASAP 2005)
Location: Samos, Greece
Web Site: http://www.ece.uvic.ca/asap2005/
S. Pasricha, N. Dutt, M. Ben-Romdhane, “Using TLM for Exploring Bus-based SoC Communication Architectures,” International Conference on Application-specific Systems, Architectures and Processors (IEEE ASAP 2005), July 2005.download pdf
International Conference on Simulation in Education (IC-SiE 2005)
Location: New Orleans, LO
Web Site: http://www.scs.org/confernc/westernsim/westernsim05/cfp/icsie05.htm
A. Cristobal-Salas, J-L. Gaudiot, C. Jauregui-Romo, E. Herran-Paz, and A. Rodriguez-Daz, “Blood Circulation Simulation Using a Distributed Decentralized-control Design,” International Conference on Simualtion in Education (IC-SiE 2005), January 23-27, 2005.