Conference Proceedings

Location: Anaheim, CA
Website: http://www.sasp-conference.org/

J. Trajkovic, D. Gajski, “Custom Processor Core Construction from C Code,” In Proceedings of Sixth IEEE Symposium on Application Specific Processors (June 2008).

Location: St. Louis, MO
Website: http://www.rtas.org/rtas2008/

Minyoung Kim, Daniel Massaguer, Nikil Dutt, Sharad Mehrotra, Shangping Ren, Mark-Oliver Stehr, Carolyn Talcott, Nalini Venkatasubramanian, “A Semantic Framework for Reconfiguration of Instrumented Cyber Physical Spaces,” Second Workshop on Event-based Semantics (WEBS’08) in conjunction with IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS’08) in part of CPSWEEK, Apr. 2008, St. Louis, MO, USA.

Location: Las Vegas, NV
Website: http://www.ieee-wcnc.org/2008/

Fred Tzeng, Amin Jahanian, Payam Heydari, “A Universal Code-Modulated Path-Sharing Multi-Antenna Receiver Architecture,” IEEE Wireless Communications & Networking Conference (WCNC), April 2008.

Location: San Jose, CA
Website: http://www.isqed.org/

A. Gupta, F. Kurdahi, N. Dutt, K. Khouri, M. Abadir.,   “Thermal Aware Global Routing of VLSI Chips for Enhanced Reliability,” Proceedings of ISQED 2008, March 2008.

Location: Munich, Germany
Website: http://www.date-conference.com/

Minyoung Kim, Mark-Oliver Stehr, Carolyn Talcott, Nikil Dutt, Nalini Venkatasubramanian, “Constraint Refinement for Online Verifiable Cross-Layer System Adaptation,” IEEE/ACM Design Automation and Test in Europe (DATE ’08), Mar. 2008, Munich, Germany.

Gunar Schirner and Rainer Dömer, “Introducing Preemptive Scheduling in Abstract RTOS Models using Result Oriented Modeling,” In Proceedings of Design Automation and Test in Europe (DATE), Munich, Germany, March 2008.

Nikil Dutt, “Design Methodology for Memory-aware NoC Exploration and Design,” Special Session on The Memory Challenge in NOC based Systems, Proceedings of the 2008 Conference on Design, Automation and Test in Europe (DATE 2008), March 2008.

Location: Monterey, CA, United States
Website: http://www.ece.wisc.edu/~kati/fpga2008/

S. Sirowy, G. Stitt, and F. Vahid. “C is for Circuits: Capturing FPGA Circuits as Sequential Code for Portability,” International Symposium on FPGAs, February 2008.

Location: Salt Lake City, Utah
Website: http://research.ihost.com/ppopp08/

Arun Kejariwal, Alexandru Nicolau, Utpal Banerjee, Alexander V. Veidenbaum, Constantine D. Polychronopoulos, “Cache-Aware Iteration Space Partitioning,” Proc. of the ACM SIGPLAN Symposium on Principles and practice of parallel programming (PPOPP) 2008.

Location: Atlanta, GA
Website: http://thedude.cc.gt.atl.ga.us/conferences/cases/

Houman Homayoun, Mohammad Makhzan and Alex Veidenbaum, “Multiple Sleep Mode Leakage Control for Cache Peripheral Circuits in Embedded Processors,” Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2008.

Location: Seoul, Korea
Website: http://www.aspdac.com/

S. Pasricha, N. Dutt, “ORB: An On-chip Optical Ring Bus Communication Architecture for Multi-Processor Systems-on-Chip,” IEEE Asia & South Pacific Design Automation Conference (ASPDAC 2008), Seoul, Korea, January 2008.

Gunar Schirner, Andreas Gerstlauer, Rainer Doemer, “Automatic Generation of Hardware dependent Software for MPSoCs from Abstract System Specifications,” Proceedings of the Asia and South Pacific Design Automation Conference (ASP-DAC), Seoul, Korea, January 2008.

Love Singhal, Sejong Oh and Eli Bozorgzadeh, “Statistical Power Profile Correlation for Realistic Thermal Estimation,” IEEE Asia and South Pacific Design Automation Conference (ASPDAC), Seoul, Korea, January 2008.

A. Shrivastava, I. Issenin , N. Dutt, “A Compiler-in-the-Loop Framework to Explore Horizontally Partitioned Cache Architectures,” Proceedings of ASPDAC-2008, January 2008.

N. Dutt, “Quo Vadis, BTSoCs (Billion Transistor SoCs)?” Panel Position Statement, Proceedings of ASPDAC-2008, January 2008.

Location: Squaw Creek, Lake Tahoe, CA
Website: http://iccd.et.tudelft.nl/

Houman Homayoun, Alex Veidenbaum and Jean-Luc Gaudiot, “Adaptive Techniques for Leakage Power Management in L2 Cache Peripheral Circuits,” Proc. IEEE International Conference on Computer Design, ICCD, 2008.

Houman Homayoun, Mohammad Makhzan and Alex Veidenbaum, ZZ-HVS, “Zig-Zag Horizontal and Vertical Sleep Transistor Sharing to Reduce Leakage Power in On-Chip SRAM Peripheral Circuits,” Proc. IEEE International Conference on Computer Design, ICCD, 2008.