Conference Proceedings

Location: Seoul, Korea
Website: http://www.aspdac.com/

S. Pasricha, N. Dutt, “ORB: An On-chip Optical Ring Bus Communication Architecture for Multi-Processor Systems-on-Chip,” IEEE Asia & South Pacific Design Automation Conference (ASPDAC 2008), Seoul, Korea, January 2008.

Gunar Schirner, Andreas Gerstlauer, Rainer Doemer, “Automatic Generation of Hardware dependent Software for MPSoCs from Abstract System Specifications,” Proceedings of the Asia and South Pacific Design Automation Conference (ASP-DAC), Seoul, Korea, January 2008.

Love Singhal, Sejong Oh and Eli Bozorgzadeh, “Statistical Power Profile Correlation for Realistic Thermal Estimation,” IEEE Asia and South Pacific Design Automation Conference (ASPDAC), Seoul, Korea, January 2008.

A. Shrivastava, I. Issenin , N. Dutt, “A Compiler-in-the-Loop Framework to Explore Horizontally Partitioned Cache Architectures,” Proceedings of ASPDAC-2008, January 2008.

N. Dutt, “Quo Vadis, BTSoCs (Billion Transistor SoCs)?” Panel Position Statement, Proceedings of ASPDAC-2008, January 2008.

Location: Squaw Creek, Lake Tahoe, CA
Website: http://iccd.et.tudelft.nl/

Houman Homayoun, Alex Veidenbaum and Jean-Luc Gaudiot, “Adaptive Techniques for Leakage Power Management in L2 Cache Peripheral Circuits,” Proc. IEEE International Conference on Computer Design, ICCD, 2008.

Houman Homayoun, Mohammad Makhzan and Alex Veidenbaum, ZZ-HVS, “Zig-Zag Horizontal and Vertical Sleep Transistor Sharing to Reduce Leakage Power in On-Chip SRAM Peripheral Circuits,” Proc. IEEE International Conference on Computer Design, ICCD, 2008.

Location: HICC, Hyderabad, India
Website: http://www.vlsiconference.com/vlsi2008/

S. Pasricha, Y. Park, S. Pasricha, Y. Park, F. Kurdahi, N. Dutt, “Incorporating PVT Variations in System-level Power Exploration of On-Chip Communication Architectures,” IEEE VLSI Design Conference (VLSID 2008), Bangalore, India, January 2008.

D. Kannan, A. Gupta, A. Shrivastava, N. Dutt, and F. Kurdahi, “PTSMT: A Tool for Cross-Level Power, Performance and Temperature Exploration of SMT Processors,” Proceedings of the 2008 International Conference on VLSI Design, Hyderabad, India, January, 2008.

Location: KaoHsiung, Taiwan
Website: http://www.rtcsa.org/

Chongjing Chen and Pai H. Chou, “EcoDAQ: A Case Study of a Densely Distributed Real-Time System for High Data Rate Wireless Data Acquisition,” to appear, in Proc. 14th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA), 2008. Kaohsiung, Taiwan.

Location: Samos, Greece
Website: http://samos.et.tudelft.nl/samos_viii/

Houman Homayoun, Mohammad Makhzan, Jean-Luc Gaudiot, and Alex Veidenbaum, “A Centralized Cache Miss Driven Technique to Improve Processor Power Dissipation,” International Symposium on Systems, Architectures, Modeling and Simulation, SAMOS VIII.

Location: Beijing, China
Website: http://isca2008.cs.princeton.edu/

Miquel Pericas, Adrian Cristal, Francisco J. Cazorla, Ruden Gonzalez, Alex Veidenbaum, Daniel A. Jimenez, and Mateo Valero, “A Two-Level Load/Store Queue based on Execution Locality,” Proc. 35th International Symposium on Computer Architecture (ISCA) June 2008.

Location: Atlanta, GA
Website: http://www.rfic2008.org/

Fred Tzeng, Amin Jahanian, Deyi Pi, Payam Heydari, “A CMOS Code-Modulated Path-Sharing Multi-Antenna Receiver Front-End for Spatial Multiplexing, Spatial Diversity and Beamforming,” IEEE RFIC Symposium, June 2008. (Nominated for the Best Paper Award).

Location: Tucson, AZ
Website: http://www.sigplan.org/lctes.htm

Carmen Badea, Alexandru Nicolau, and Alexander V. Veidenbaum, “Impact of JVM superoperators on energy consumption in resource-constrained embedded systems,” Proc. of the ACM SIGPLAN-SIGBED conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), 2008.

D. Cho, I. Issenin, S. Pasricha, N. Dutt, and Y. Paek,  “Compiler Driven Data Layout Optimization for Regular/Irregular Array Access Patterns,”  Proceedings of ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES08) , June 2008.

Houman Homayoun, Sudeep Pasricha, Mohammad A. Makhzan, Alexander V. Veidenbaum, “Improving performance and reducing energy-delay with adaptive resource resizing for out-of-order embedded processors,” ACM SIGPLAN/SIGBED 2008 Conference on Languages, Compilers, and Tools for Embedded Systems, LCTES 2008.

Location: Anaheim, CA
Website: http://www.nanoarch.org/08/index.html

S. Pasricha, N. Dutt, and F. Kurdahi. “System Level Performance Analysis of Carbon Nanotube Global Interconnects for Emerging Chip Multiprocessors,” Proceedings of  the IEEE/ACM International Symposium on NanoScale Architectures (NanoArch 2008), Anaheim, CA, June 2008.

Location: Anaheim, CA, United States
Website: http://www.dac.com/

N. Dutt, “ESL Hand-off: Fact or EDA Fiction?” Panel Position Statement, Proceedings of the Design Automation Conference 2008 (DAC 2008), Anaheim, CA, June 2008.

Houman Homayoun, Sudeep Pasricha, Mohammad A. Makhzan, and Alexander V. Veidenbaum, “Dynamic Register File Resizing and Frequency Scaling to Improve Embedded Processor Performance and Energy-Delay Efficiency,” Proc. of the Design Automation Conference (DAC) 2008.