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Design, Automation, and Test in Europe Conference (DATE ‘03)

F. Doucet, R. Gupta, and S. Shukla, “Introspection in System-Level Language Frameworks: Meta-Level or Integrated,” Design, Automation, and Test in Europe Conference (DATE ‘03), pp 382-387, Munich, Germany, March 2003 download pdf A. Gerstlauer, H. Yu, and...

4th Workshop on Microprocessor Test and Verification

P. Mishra and N. Dutt, “A Methodology for Validation of Microprocessors using Equivalence Checking Communication Refinement for System Level Design,” 4th Workshop on Microprocessor Test and Verification, Austin, TX, May 2003

40th Design Automation Conference (DAC)

S. Abdi, D. Shin, and D. Gajski, “Automatic Communication Refinement for System Level Design,” 40th Design Automation Conference, pp 300-305, Anaheim, CA, June 2003 download pdf E. Bozorgzadeh, S. Ghiasi, A. Takahashi, and M. Sarrafzadeh, “Optimal...

14th IEEE Workshop on Rapid System Prototyping

P. Mishra, A. Kejariwal, and N. Dutt, “Rapid Exploration of Pipelined Processors Through Automatic Generation of Synthesizable RTL Models,” 14th IEEE Workshop on Rapid System Prototyping, pp 226-232, San Diego, CA, June 2003

2003 International Symposium on Low Power Electronics and Design

P. Chou, C. Park, J. Park, K. Pham, and J. Liu, “B#: a Battery Emulator and Power Profiling Instrument,” 2003 International Symposium on Low Power Electronics and Design, pp 288-293, Seoul, Korea, August 2003 download pdf P.Heydari and Y. Zhang, “A...