Date: January 28-30, 2010 Location: San Jose, CA, USA Website: http://www.inf.pucrs.br/wosp/ A. Kejariwal, M. Girkar, X. Tian, H. Saito, A. Nicoau, A. Veidenbaum, U. Banerjee, C. Polychronopoulos, “On the Efficacy of Call Graph-level Thread-level Speculation,”...
Date: February 22-24, 2009 Location: Monterey, CA, USA Website:http://www.ece.wisc.edu/~kati/fpga2009/index.html D. Sheldon, F. Vahid, “Making Good Points: Application-specific Pareto-point Generation for Design Space Exploration using Statistical Methods,” FPGA...
Date: August 19-21, 2009 Location: San Francisco, CA, USA Website: http://www.islped.org/X2009/ Jinsik Kim, Pai H. Chou,“Remote Progressive Firmware Update for Flash-Based Networked Embedded Systems,” ISLPED 2009:407-412 Chien-Ying Chen and Pai H. Chou,”DuraCap:...
Date: April 5-7, 2009 Location: Napa, CA, USA Website: http://fccm.org/FCCM09.php A. Gholamipour, H. Eslami, A. Eltawil, F. Kurdahi, “Size-Reconfiguration Delay Tradeoffs for a Class of DSP Blocks in Multi-mode Communication Systems,” FCCM...
Date: March 16-18, 2009 Location: San Jose, CA, USA Website: http://www.isqed.org/English/Archives/2009/index.html Seung Eun Lee; Wilkerson, C.; Ming Zhang; Yavatkar, R.; Shih-Lien Lu; N. Bagherzadeh, “Low power adaptive pipeline based on instruction...
