Functional Verification of System Level Model Refinements
by Samar Abdi, University of California, IrvineDecember 2, 2005
949-824-9127
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PhD Defenses
Cache Power-Performance Optimization
by Dan Nicolaescu, University of California, IrvineDecember 2, 2005
Compiler-in-the-Loop Exploration of Programmable Embedded Systems
by Aviral Shrivastava, University of California, IrvineFebruary 1, 2006
Acceleration beyond Memory Barriers in IS-extensible Processors
by Partha Biswas, University of California, IrvineMarch 2, 2006
Multiprocessor System-on-Chip Data Memory Customization for Embedded Array-Intensive Applications
by Ilya Issenin, University of California, Irvine 2007
Content Annotation for Power and Quality Trade-Offs in Mobile Multimedia Systems
by Radu Cornea, University of California, Irvine, CAMarch 2007
New Strategies for System-Level Design
Keynote talk by Prof. Daniel Gajski,Center for Embedded Computer Systems,
University of California, Irvine.
April 11, 2007
Software for Embedded Systems: Serializing Compilers and Its Applications
by Andre Costi Nacul, University of California, IrvineApril 23, 2007
No-Instruction-Set-Computer (NISC) Modeling and Compilation Abstract
by Mehrdad Reshadi, University of California, IrvineSeptember 18, 2007
Software Architecture for High Data Rate Wireless Body Sensor Applications
by Seung-Mok Yoo, University of California, IrvineSeptember 20, 2007
Synthesis and Optimization of Low-Power Custom NISC Processors
by Bita Gorjiara, University of California, IrvineDecember 6, 2007
Analysis and Optimization of Transaction Level Models for Multi-Processor System-on-Chip Design
by Gunar Schirner, University of California, IrvineMarch 3, 2008